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Initial checkin of COMROGUE source after having gotten initial memory map right

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Eric J. Bowersox
2013-04-11 02:10:10 -06:00
commit 5b93e58fb3
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141
include/comrogue/internals/16550.h Normal file
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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __X__16550_H_INCLUDED
#define __X__16550_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
/*------------------------------------------------------------------------------------------------------------
* Standard bits used in the registers of a 16550 UART. Note that not all of these bits are supported by the
* BCM2835 mini-UART; they are included here for completeness.
*------------------------------------------------------------------------------------------------------------
*/
/* Interrupt Enable Register (read/write) */
#define U16550_IER_RXREADY 0x01 /* Receive Ready interrupt */
#define U16550_IER_TXEMPTY 0x02 /* Transmit Empty interrupt */
#define U16550_IER_ERRBRK 0x04 /* Error/Break iterrupt */
#define U16550_IER_SINPUT 0x08 /* Status change interrupt */
/* Interrupt Identification Register (read-only) */
#define U16550_IIR_NOPENDING 0x01 /* Set if no interrupt is pending */
#define U16550_IIR_ID_MASK 0x0E /* Pending interrupt mask */
#define U16550_IIR_ID_ERRBRK 0x06 /* Error/Break interrupt */
#define U16550_IIR_ID_RXREADY 0x04 /* Receive Ready interrupt */
#define U16550_IIR_ID_RXTIMEOUT 0x0C /* Receive Timeout interrupt */
#define U16550_IIR_ID_TXEMPTY 0x02 /* Transmit Empty interrupt */
#define U16550_IIR_ID_SINPUT 0x00 /* Status change interrupt */
#define U16550_IIR_RXFIFO 0x40 /* Receive FIFO enabled */
#define U16550_IIR_TXFIFO 0x80 /* Transmit FIFO enabled */
/* FIFO Control Register (write-only) */
#define U16550_FCR_ENABLE 0x01 /* Enable FIFOs */
#define U16550_FCR_RXCLEAR 0x02 /* Clear receive FIFO */
#define U16550_FCR_TXCLEAR 0x04 /* Clear transmit FIFO */
#define U16550_FCR_MODE 0x08 /* FIFO mode select */
#define U16550_FCR_LEVEL_MASK 0xC0 /* FIFO level mask */
#define U16550_FCR_LEVEL_1 0x00 /* FIFO level: 1 character */
#define U16550_FCR_LEVEL_4 0x40 /* FIFO level: 4 characters */
#define U16550_FCR_LEVEL_8 0x80 /* FIFO level: 8 characters */
#define U16550_FCR_LEVEL_14 0xC0 /* FIFO level: 14 characters */
/* Line Control Register (read/write) */
#define U16550_LCR_LENGTH_MASK 0x03 /* Data length control mask */
#define U16550_LCR_LENGTH_5 0x00 /* Data length: 5 bits */
#define U16550_LCR_LENGTH_6 0x01 /* Data length: 6 bits */
#define U16550_LCR_LENGTH_7 0x02 /* Data length: 7 bits */
#define U16550_LCR_LENGTH_8 0x03 /* Data length: 8 bits */
#define U16550_LCR_STOP 0x04 /* Set = 2 stop bits, Clear = 1 stop bit */
#define U16550_LCR_PARITY_MASK 0x38 /* Parity control mask */
#define U16550_LCR_PARITY_NONE 0x00 /* Parity: NONE */
#define U16550_LCR_PARITY_ODD 0x08 /* Parity: ODD */
#define U16550_LCR_PARITY_EVEN 0x18 /* Parity: EVEN */
#define U16550_LCR_PARITY_MARK 0x28 /* Parity: MARK */
#define U16550_LCR_PARITY_SPACE 0x38 /* Parity: SPACE */
#define U16550_LCR_BREAK 0x40 /* Send BREAK when set */
#define U16550_LCR_DLAB 0x80 /* Divisor Latch Access Bit */
/* Modem Control Register (read/write) */
#define U16550_MCR_DTR 0x01 /* Set Data Terminal Ready */
#define U16550_MCR_RTS 0x02 /* Set Request To Send */
#define U16550_MCR_OP1 0x04 /* Set General-Purpose Output 1 */
#define U16550_MCR_OP2 0x08 /* Set General-Purpose Output 2 */
#define U16550_MCR_LOOPBACK 0x10 /* Loopback test mode */
/* Line Status Register (read-only) */
#define U16550_LSR_RXDATA 0x01 /* Received data ready */
#define U16550_LSR_OVERRUNERR 0x02 /* Receiver overrun error */
#define U16550_LSR_PARITYERR 0x04 /* Parity error */
#define U16550_LSR_FRAMEERR 0x08 /* Framing error */
#define U16550_LSR_BREAK 0x10 /* BREAK detected */
#define U16550_LSR_TXBUFEMPTY 0x20 /* Transmitter buffer empty */
#define U16550_LSR_TXEMPTY 0x40 /* Transmitter empty */
/* Modem Status Register (read-only) */
#define U16550_MSR_DELTA_CTS 0x01 /* change in Clear To Send line */
#define U16550_MSR_DELTA_DSR 0x02 /* change in Data Set Ready line */
#define U16550_MSR_DELTA_RI 0x04 /* change in Ring Indicator line */
#define U16550_MSR_DELTA_CD 0x08 /* change in Carrier Detect line */
#define U16550_MSR_CTS 0x10 /* Clear To Send */
#define U16550_MSR_DSR 0x20 /* Data Set Ready */
#define U16550_MSR_RI 0x40 /* Ring Indicator */
#define U16550_MSR_CD 0x80 /* Carrier Detect */
/* BCM2835-specific: Auxiliary control register (read/write) */
#define AUXMU_CNTL_RXENABLE 0x00000001 /* Receiver enable */
#define AUXMU_CNTL_TXENABLE 0x00000002 /* Transmitter enable */
#define AUXMU_CNTL_RXAUTOFLOW 0x00000004 /* Reciever auto-flow-control enabled */
#define AUXMU_CNTL_TXAUTOFLOW 0x00000008 /* Transmitter auto-flow-control enabled */
#define AUXMU_CNTL_RXAUTO_MASK 0x00000030 /* Receiver auto-flow-control level */
#define AUXMU_CNTL_RXAUTO_3 0x00000000 /* Receiver auto-flow-control: 3 spaces remaining */
#define AUXMU_CNTL_RXAUTO_2 0x00000010 /* Receiver auto-flow-control: 2 spaces remaining */
#define AUXMU_CNTL_RXAUTO_1 0x00000020 /* Receiver auto-flow-control: 1 space remaining */
#define AUXMU_CNTL_RXAUTO_4 0x00000030 /* Receiver auto-flow-control: 4 spaces remaining */
#define AUXMU_CNTL_RTSASSERT 0x00000040 /* RTS assert level invert */
#define AUXMU_CNTL_CTSASSERT 0x00000080 /* CTS assert level invert */
/* BCM2835-specific: Auxiliary status register (read-only) */
#define AUXMU_STAT_RXREADY 0x00000001 /* Receive ready */
#define AUXMU_STAT_TXREADY 0x00000002 /* Transmit ready */
#define AUXMU_STAT_RXIDLE 0x00000004 /* Receiver idle */
#define AUXMU_STAT_TXIDLE 0x00000008 /* Transmitter idle */
#define AUXMU_STAT_RXOVERRUN 0x00000010 /* Receiver overrun */
#define AUXMU_STAT_TXFULL 0x00000020 /* Transmit FIFO is full */
#define AUXMU_STAT_RTS 0x00000040 /* Request To Send line */
#define AUXMU_STAT_CTS 0x00000080 /* Clear To Send line */
#define AUXMU_STAT_TXDONE 0x00000100 /* Transmitter done (Tx idle, FIFO empty) */
#define AUXMU_STAT_RXLEVEL_MASK 0x000F0000 /* Receive FIFO fill level mask */
#define AUXMU_STAT_TXLEVEL_MASK 0x0F000000 /* Transmit FIFO fill level mask */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __X__16550_H_INCLUDED */

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include/comrogue/internals/asm-macros.h Normal file
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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __ASM_MACROS_H_INCLUDED
#define __ASM_MACROS_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
#ifndef __ASM__
#error "This file should be included in assembly language code only"
#endif
/* Instruction barrier macro */
.macro instr_barrier
mcr p15, 0, r0, c7, c5, 4
.endm
/* Data synchronization barrier macro */
.macro data_sync_barrier
mcr p15, 0, r0, c7, c10, 4
.endm
/* Data memory barrier macro */
.macro data_memory_barrier
mcr p15, 0, r0, c7, c10, 5
.endm
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __ASM_MACROS_H_INCLUDED */

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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __AUXDEV_H_INCLUDED
#define __AUXDEV_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
/*-------------------------------
* BCM2835 auxiliary peripherals
*-------------------------------
*/
/* Register physical addresses */
#define AUX_REG_IRQ 0x20215000 /* AUX interrupt status */
#define AUX_REG_ENABLE 0x20215004 /* AUX enable */
#define AUX_MU_REG_THR 0x20215040 /* Mini-UART Transmitter Holding Register */
#define AUX_MU_REG_RHR 0x20215040 /* Mini-UART Receiver Holding Register */
#define AUX_MU_REG_IER 0x20215044 /* Mini-UART Interrupt Enable Register */
#define AUX_MU_REG_IIR 0x20215048 /* Mini-UART Interrupt Identification Register */
#define AUX_MU_REG_FCR 0x20215048 /* Mini-UART FIFO Control Register */
#define AUX_MU_REG_LCR 0x2021504C /* Mini-UART Line Control Register */
#define AUX_MU_REG_MCR 0x20215050 /* Mini-UART Modem Control Register */
#define AUX_MU_REG_LSR 0x20215054 /* Mini-UART Line Status Register */
#define AUX_MU_REG_MSR 0x20215058 /* Mini-UART Modem Status Register */
#define AUX_MU_REG_SCR 0x2021505C /* Mini-UART Scratch Register */
#define AUX_MU_REG_CNTL 0x20215060 /* Mini-UART Auxiliary Control Register */
#define AUX_MU_REG_STAT 0x20215064 /* Mini-UART Auxiliary Status Register */
#define AUX_MU_REG_BAUD 0x20215068 /* Mini-UART Baud Rate Register */
#define AUX_SPI0_REG_CTL0 0x20215080 /* SPI 0 Control Register 0 */
#define AUX_SPI0_REG_CTL1 0x20215084 /* SPI 0 Control Register 1 */
#define AUX_SPI0_REG_STAT 0x20215088 /* SPI 0 Status Register */
#define AUX_SPI0_REG_IO 0x20215090 /* SPI 0 Data Register */
#define AUX_SPI0_REG_PEEK 0x20215094 /* SPI 0 Peek Register */
#define AUX_SPI1_REG_CTL0 0x202150C0 /* SPI 1 Control Register 0 */
#define AUX_SPI1_REG_CTL1 0x202150C4 /* SPI 1 Control Register 1 */
#define AUX_SPI1_REG_STAT 0x202150C8 /* SPI 1 Status Register */
#define AUX_SPI1_REG_IO 0x202150D0 /* SPI 1 Data Register */
#define AUX_SPI1_REG_PEEK 0x202150D4 /* SPI 1 Peek Register */
/* AUX IRQ register bits */
#define AUX_IRQ_MU 0x00000001 /* Mini-UART has interrupt pending */
#define AUX_IRQ_SPI0 0x00000002 /* SPI 0 has interrupt pending */
#define AUX_IRQ_SPI1 0x00000004 /* SPI 1 has interrupt pending */
/* AUX Enable register bits */
#define AUX_ENABLE_MU 0x00000001 /* Mini-UART enable */
#define AUX_ENABLE_SPI0 0x00000002 /* SPI 0 enable */
#define AUX_ENABLE_SPI1 0x00000004 /* SPI 1 enable */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __AUXDEV_H_INCLUDED__ */

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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __GPIO_H_INCLUDED
#define __GPIO_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
/*--------------------
* BCM2835 GPIO lines
*--------------------
*/
/* GPIO register physical addresses */
#define GPFSEL0_REG 0x20200000 /* GPIO Function Select 0 (lines 0-9) */
#define GPFSEL1_REG 0x20200004 /* GPIO Function Select 1 (lines 10-19) */
#define GPFSEL2_REG 0x20200008 /* GPIO Function Select 2 (lines 20-29) */
#define GPFSEL3_REG 0x2020000C /* GPIO Function Select 3 (lines 30-39) */
#define GPFSEL4_REG 0x20200010 /* GPIO Function Select 4 (lines 40-49) */
#define GPFSEL5_REG 0x20200014 /* GPIO Function Select 5 (lines 50-53) */
#define GPSET0_REG 0x2020001C /* GPIO Output Set 0 (lines 0-31) */
#define GPSET1_REG 0x20200020 /* GPIO Output Set 1 (lines 32-53) */
#define GPCLR0_REG 0x20200028 /* GPIO Output Clear 0 (lines 0-31) */
#define GPCLR1_REG 0x2020002C /* GPIO Output Clear 1 (lines 32-53) */
#define GPLEV0_REG 0x20200034 /* GPIO Pin Level Detect 0 (lines 0-31) */
#define GPLEV1_REG 0x20200038 /* GPIO Pin Level Detect 1 (lines 32-53) */
#define GPEDS0_REG 0x20200040 /* GPIO Pin Event Detect Status 0 (lines 0-31) */
#define GPEDS1_REG 0x20200044 /* GPIO Pin Event Detect Status 1 (lines 32-53) */
#define GPREN0_REG 0x2020004C /* GPIO Pin Rising Edge Detect Enable 0 (lines 0-31) */
#define GPREN1_REG 0x20200050 /* GPIO Pin Rising Edge Detect Enable 1 (lines 32-53) */
#define GPFEN0_REG 0x20200085 /* GPIO Pin Falling Edge Detect Enable 0 (lines 0-31) */
#define GPFEN1_REG 0x2020005C /* GPIO Pin Falling Edge Detect Enable 1 (lines 32-53) */
#define GPHEN0_REG 0x20200064 /* GPIO Pin High Level Detect Enable 0 (lines 0-31) */
#define GPHEN1_REG 0x20200068 /* GPIO Pin High Level Detect Enable 1 (lines 32-53) */
#define GPLEN0_REG 0x20200070 /* GPIO Pin Low Level Detect Enable 0 (lines 0-31) */
#define GPLEN1_REG 0x20200074 /* GPIO Pin Low Level Detect Enable 1 (lines 32-53) */
#define GPAREN0_REG 0x2020007C /* GPIO Pin Async Rising Edge Detect Enable 0 (lines 0-31) */
#define GPAREN1_REG 0x20200080 /* GPIO Pin Async Rising Edge Detect Enable 1 (lines 32-53) */
#define GPAFEN0_REG 0x20200088 /* GPIO Pin Async Falling Edge Detect Enable 0 (lines 0-31) */
#define GPAFEN1_REG 0x2020008C /* GPIO Pin Async Falling Edge Detect Enable 1 (lines 32-53) */
#define GPPUD_REG 0x20200094 /* GPIO Pin Pull-up/down Enable */
#define GPPUDCLK0_REG 0x20200098 /* GPIO Pin Pull-up/down Enable Clock 0 (lines 0-31) */
#define GPPUDCLK1_REG 0x2020009C /* GPIO Pin Pull-up/down Enable Clock 1 (lines 32-53) */
#define GP_PIN_MASK 0x0007 /* GPIO pin function select mask */
#define GP_PIN_INPUT 0x0000 /* GPIO pin function is input */
#define GP_PIN_OUTPUT 0x0001 /* GPIO pin function is output */
#define GP_PIN_ALT0 0x0004 /* GPIO pin alternate function 0 */
#define GP_PIN_ALT1 0x0005 /* GPIO pin alternate function 1 */
#define GP_PIN_ALT2 0x0006 /* GPIO pin alternate function 2 */
#define GP_PIN_ALT3 0x0007 /* GPIO pin alternate function 3 */
#define GP_PIN_ALT4 0x0003 /* GPIO pin alternate function 4 */
#define GP_PIN_ALT5 0x0002 /* GPIO pin alternate function 5 */
#define GP_FUNC_MASK(n) (GP_PIN_MASK << ((n) * 3))
#define GP_FUNC_BITS(n, bits) (((bits) & GP_PIN_MASK) << ((n) * 3))
#define GP_BIT(n) (1 << (n))
#define GPPUD_DISABLE 0x0000 /* Disable pull-up/pull-down */
#define GPPUD_PULLDOWN 0x0001 /* Enable pull-down */
#define GPPUD_PULLUP 0x0002 /* Enable pull-up */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __GPIO_H_INCLUDED */

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include/comrogue/internals/layout.h Normal file
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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __LAYOUT_H_INCLUDED
#define __LAYOUT_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
/*-----------------------------------------------------------
* Constants defining the layout of the COMROGUE memory map.
*-----------------------------------------------------------
*/
#define PHYSADDR_LOAD 0x8000 /* physical address at which the loader loads the kernel */
#define PHYSADDR_IO_BASE 0x20000000 /* physical address that's the base for memory-mapped IO */
#define VMADDR_TTB_FENCE 0x80000000 /* address that's the dividing point between TTBs */
#define VMADDR_LIBRARY_FENCE 0xB0000000 /* base address for kernel "shared library" code */
#define VMADDR_KERNEL_FENCE 0xC0000000 /* base address for the internal kernel code */
#define VMADDR_IO_BASE 0xE0000000 /* base address for memory-mapped IO */
#define PAGE_COUNT_IO 1024 /* 4 megabytes mapped for IO */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __LAYOUT_H_INCLUDED */

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#ifndef __LLIO_H_INCLUDED
#define __LLIO_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
#ifndef __ASM__
#include <comrogue/types.h>
#include <comrogue/compiler_macros.h>
/*--------------------------------------------------------------------------------------
* Functions for performing low-level IO (direct read and write of memory-mapped ports)
*--------------------------------------------------------------------------------------
*/
#ifdef __COMROGUE_PRESTART__
CDECL_BEGIN
extern void llIOWritePA(PHYSADDR paPort, UINT32 uiData);
extern UINT32 llIOReadPA(PHYSADDR paPort);
extern void llIODelayPA(UINT32 uiTicks);
#define llIOWrite(addr, data) llIOWritePA(addr, data)
#define llIORead(addr) llIOReadPA(addr)
#define llIODelay(ticks) llIODelayPA(ticks)
CDECL_END
#else
CDECL_BEGIN
extern void llIOWriteK(KERNADDR kaPort, UINT32 uiData);
extern UINT32 llIOReadK(KERNADDR kaPort);
extern void llIODelay(UINT32 uiTicks);
CDECL_END
#define _LLIOMAP(addr) ((addr) + 0xC0000000)
#define llIOWrite(addr, data) llIOWriteK(_LLIOMAP(addr), data)
#define llIORead(addr) llIOReadK(_LLIOMAP(addr))
#endif /* __COMROGUE_PRESTART__ */
#endif /* __ASM__ */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __LLIO_H_INCLUDED */

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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __MMU_H_INCLUDED
#define __MMU_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
/*----------------------------------------------
* BCM2835 ARM Memory Management Unit constants
*----------------------------------------------
*/
/* Memory system constants */
#define SYS_PAGE_SIZE 4096 /* standard page size for normal page */
#define SYS_PAGE_BITS 12 /* log2(SYS_PAGE_SIZE), number of bits in a page address */
#define SYS_TTB0_SIZE 8192 /* TTB0 must be located on this boundary and is this size */
#define SYS_TTB1_SIZE 16384 /* TTB1 must be located on this boundary and is this size */
#define SYS_TTB1_ENTRIES 4096 /* SYS_TTB1_SIZE/4, number of entries in TTB1 */
#define SYS_TTB_BITS 12 /* log2(SYS_TTB1_SIZE/4), number of bits in a TTB address */
#define SYS_SEC_SIZE 1048576 /* standard section size */
#define SYS_SEC_PAGES 256 /* SYS_SEC_SIZE/SYS_PAGE_SIZE, number of pages equivalent to a section */
#define SYS_PGTBL_SIZE 1024 /* page tables must be located on this boundary and are this size */
#define SYS_PGTBL_BITS 8 /* log2(SYS_PGTBL_SIZE/4), number of bits in a page table address */
#define SYS_PGTBL_ENTRIES 256 /* SYS_PGTBL_SIZE/4, number of entries in a page table */
/* Section descriptor bits */
#define TTBSEC_PXN 0x00000001 /* Privileged Execute-Never */
#define TTBSEC_ALWAYS 0x00000002 /* this bit must always be set for a section */
#define TTBSEC_B 0x00000004 /* memory region attribute bit */
#define TTBSEC_C 0x00000008 /* memory region attribute bit */
#define TTBSEC_XN 0x00000010 /* Execute-Never */
#define TTBSEC_DOM_MASK 0x000001E0 /* domain indicator */
#define TTBSEC_P 0x00000200 /* ECC enabled (not supported) */
#define TTBSEC_AP 0x00000C00 /* access permission bits */
#define TTBSEC_TEX 0x00007000 /* memory type flags */
#define TTBSEC_APX 0x00008000 /* access permission extended */
#define TTBSEC_S 0x00010000 /* Shared */
#define TTBSEC_NG 0x00020000 /* Not Global */
#define TTBSEC_SUPER 0x00040000 /* Set for supersections */
#define TTBSEC_NS 0x00080000 /* Not Secure */
#define TTBSEC_ALLFLAGS 0x000FFFFF /* "all flags" mask */
#define TTBSEC_BASE 0xFFF00000 /* section base address mask */
#define TTBSEC_SBASE 0xFF000000 /* supersection base address mask */
#define TTBSEC_SBASEHI 0x00F00000 /* supersection high base address mask */
/* AP bits for the standard access control model */
#define TTBSEC_AP00 0x00000000 /* no access */
#define TTBSEC_AP01 0x00000400 /* supervisor only access */
#define TTBSEC_AP10 0x00000800 /* user read-only access */
#define TTBSEC_AP11 0x00000C00 /* user read-write access */
/* AP bits for the simplified access control model */
#define TTBSEC_ACCESS 0x00000400 /* Accessed bit */
#define TTBSEC_AP_PL0 0x00000800 /* enable access at PL0 */
#define TTBSEC_AP_RO TTBSEC_APX /* read-only access */
/* Page table descriptor bits */
#define TTBPGTBL_ALWAYS 0x00000001 /* bottom-two bits are always this */
#define TTBPGTBL_PXN 0x00000004 /* Privileged Execute-Never */
#define TTBPGTBL_NS 0x00000008 /* Not Secure */
#define TTBPGTBL_DOM_MASK 0x000001E0 /* domain indicator */
#define TTBPGTBL_P 0x00000200 /* ECC enabled (not supported) */
#define TTBPGTBL_ALLFLAGS 0x000003FF /* "all flags" mask */
#define TTBPGTBL_BASE 0xFFFFFC00 /* page table base address mask */
/* Bits to query the type of TTB entry we're looking at */
#define TTBQUERY_MASK 0x00000003 /* bits we can query */
#define TTBQUERY_FAULT 0x00000000 /* indicates a fault */
#define TTBQUERY_PGTBL 0x00000001 /* indicates a page table */
#define TTBQUERY_SEC 0x00000002 /* indicates a section */
#define TTBQUERY_PXNSEC 0x00000003 /* indicates a section with PXN (or reserved) */
/* Small page table entry bits */
#define PGTBLSM_XN 0x00000001 /* Execute-Never */
#define PGTBLSM_ALWAYS 0x00000002 /* this bit must always be set for a page table entry */
#define PGTBLSM_B 0x00000004 /* memory region attribute bit */
#define PGTBLSM_C 0x00000008 /* memory region attribute bit */
#define PGTBLSM_AP 0x00000030 /* access permission bits */
#define PGTBLSM_TEX 0x000001C0 /* memory type flags */
#define PGTBLSM_APX 0x00000200 /* access permission extended */
#define PGTBLSM_S 0x00000400 /* Shared */
#define PGTBLSM_NG 0x00000800 /* Not Global */
#define PGTBLSM_PAGE 0xFFFFF000 /* page base address mask */
/* AP bits for the standard access control model */
#define PGTBLSM_AP00 0x00000000 /* no access */
#define PGTBLSM_AP01 0x00000010 /* supervisor only access */
#define PGTBLSM_AP10 0x00000020 /* user read-only access */
#define PGTBLSM_AP11 0x00000030 /* user read-write access */
/* Bits to query the type of page table entry we're looking at */
#define PGQUERY_MASK 0x00000003 /* bits we can query */
#define PGQUERY_FAULT 0x00000000 /* indicates a fault */
#define PGQUERY_LG 0x00000001 /* large page (64K) */
#define PGQUERY_SM 0x00000002 /* small page (4K) */
#define PGQUERY_SM_XN 0x00000003 /* small page with Execute-Never set */
#ifndef __ASM__
/*-------------------------------------------------------
* Data structures defining the TTB and page table data.
*-------------------------------------------------------
*/
/* TTB fault descriptor */
typedef struct tagTTBFAULT {
unsigned always0 : 2; /* bits are always 0 for a fault entry */
unsigned ignored : 30; /* ignored (COMROGUE may define these later) */
} TTBFAULT, *PTTBFAULT;
/* TTB page table descriptor */
typedef struct tagTTBPGTBL {
unsigned always01 : 2; /* bits are always 01 for a page table */
unsigned pxn : 1; /* Privileged Execute-Never bit */
unsigned ns : 1; /* Not Secure bit */
unsigned always0 : 1; /* bit is always 0 for a page table */
unsigned domain : 4; /* protection domain */
unsigned p : 1; /* not supported, should be 0 */
unsigned baseaddr : 22; /* upper 22 bits of base address of page table */
} TTBPGTBL, *PTTBPGTBL;
/* TTB section descriptor */
typedef struct tagTTBSEC {
unsigned pxn : 1; /* Privileged Execute-Never bit */
unsigned always1: 1; /* bit is always 1 for a section */
unsigned b : 1; /* attribute bit ("Buffered") */
unsigned c : 1; /* attribute bit ("Cached") */
unsigned xn : 1; /* Execute-Never bit */
unsigned domain : 4; /* protection domain */
unsigned p : 1; /* not supported, should be 0 */
unsigned ap : 2; /* access permissions */
unsigned tex : 3; /* memory type flags */
unsigned ap2 : 1; /* access permission extension */
unsigned s : 1; /* Shared bit */
unsigned ng : 1; /* Not Global bit */
unsigned always0 : 1; /* bit is always 0 for a section */
unsigned ns : 1; /* Not Secure bit */
unsigned baseaddr : 12; /* upper 12 bits of base address of section */
} TTBSEC, *PTTBSEC;
/* Single TTB entry descriptor */
typedef union tagTTB {
UINT32 data; /* raw data for entry */
TTBFAULT fault; /* "fault" data */
TTBPGTBL pgtbl; /* page table data */
TTBSEC sec; /* 1Mb section data */
} TTB, *PTTB;
/* page table descriptor for a fault entry */
typedef struct tagPGTBLFAULT {
unsigned always0 : 2; /* bits are always 0 for a fault entry */
unsigned ignored : 30; /* ignored (COMROGUE may define these later) */
} PGTBLFAULT, *PPGTBLFAULT;
/* page table descriptor for regular 4K pages */
typedef struct tagPGTBLSM {
unsigned xn : 1; /* Execute Never */
unsigned always1 : 1; /* always 1 for a 4k small page */
unsigned b : 1; /* attribute bit ("Buffered") */
unsigned c : 1; /* attribute bit ("Cached") */
unsigned ap : 2; /* access permissions */
unsigned tex : 3; /* memory type flags */
unsigned apx : 1; /* access permission extension */
unsigned s : 1; /* Shared bit */
unsigned ng : 1; /* Not Global bit */
unsigned pgaddr : 20; /* upper 20 bits of base address of page */
} PGTBLSM, *PPGTBLSM;
/* single page table entry */
typedef union tagPGTBL {
UINT32 data; /* raw data for entry */
PGTBLFAULT fault; /* "fault" data */
PGTBLSM pg; /* small page descriptor */
} PGTBL, *PPGTBL;
/* page table auxiliary entry */
typedef union tagPGAUX {
UINT32 data; /* raw data for entry */
/* TODO */
} PGAUX, *PPGAUX;
/* complete structure of a page table, hardware + auxiliary */
typedef struct tagPAGETAB {
PGTBL pgtbl[SYS_PGTBL_ENTRIES]; /* hardware page table entries */
PGAUX pgaux[SYS_PGTBL_ENTRIES]; /* auxiliary page table entries */
} PAGETAB, *PPAGETAB;
/* VMA index macros */
#define mmVMA2TTBIndex(vma) (((vma) >> (SYS_PAGE_BITS + SYS_PGTBL_BITS)) & ((1 << SYS_TTB_BITS) - 1))
#define mmVMA2PGTBLIndex(vma) (((vma) >> SYS_PAGE_BITS) & ((1 << SYS_PGTBL_BITS) - 1))
/*
* Data structures for the Master Page Database.
*/
/* internal structure of a MPDB entry */
typedef struct tagMPDB1 {
unsigned next : 20; /* index of "next" entry in list */
unsigned tag : 12; /* page tag */
} MPDB1;
/* The MPDB entry itself. */
typedef union tagMPDB {
UINT32 raw; /* raw data */
MPDB1 d; /* structured data */
} MPDB, *PMPDB;
#endif /* __ASM__ */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __MMU_H_INCLUDED */

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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __SCTLR_H_INCLUDED
#define __SCTLR_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
/*------------------------------------------------------
* Bits in the System Control Register (SCTLR), CP15 c1
*------------------------------------------------------
*/
#define SCTLR_M 0x00000001 /* MMU: 1 = enabled, 0 = disabled */
#define SCTLR_A 0x00000002 /* Alignment check: 1 = enabled, 0 = disabled */
#define SCTLR_C 0x00000004 /* Cache: 1 = enabled, 0 = disabled */
#define SCTLR_CP15BEN 0x00000020 /* CP15 barrier operations: 1 = enabled (default), 0 = disabled */
#define SCTLR_B 0x00000080 /* Endianness: 0 = default, do not modify */
#define SCTLR_SW 0x00000400 /* SWP/SWPB instructions: 0 = disable, 1 = enable */
#define SCTLR_Z 0x00000800 /* Branch prediction: 0 = disable, 1 = enable */
#define SCTLR_I 0x00001000 /* Instruction cache: 0 = disable, 1 = enable */
#define SCTLR_V 0x00002000 /* Exception vectors: 0 = 0x00000000 (configurable), 1 = 0xFFFF0000 (fixed) */
#define SCTLR_RR 0x00004000 /* Cache strategy: 0 = normal, 1 = round-robin */
#define SCTLR_L4 0x00008000 /* PC load reset T-bit: 0 = yes, 1 = no */
#define SCTLR_HA 0x00020000 /* Hardware access flag: 0 = disabled, 1 = enabled */
#define SCTLR_WXN 0x00080000 /* Write permission implies XN: 0 = no, 1 = yes */
#define SCTLR_UWXN 0x00100000 /* Unprivileged write permission implies PL1 XN: 0 = no, 1 = yes */
#define SCTLR_FI 0x00200000 /* Fast interrupts: 0 = normal, 1 = low-latency */
#define SCTLR_U 0x00400000 /* unaligned access: 0 = disabled (default), 1 = enabled */
#define SCTLR_XP 0x00800000 /* subpage AP bits: 0 = enabled, 1 = disabled */
#define SCTLR_VE 0x01000000 /* Interrupt vectors: 0 = standard, 1 = determined by VIC */
#define SCTLR_EE 0x02000000 /* Exception endianness: 0 = little-endian (default), 1 = big-endian */
#define SCTLR_NMFI 0x08000000 /* Non-maskable FIQ: 0 = disabled, 1 = enabled */
#define SCTLR_TRE 0x10000000 /* TEX attributes remap: 0 = disabled, 1 = enabled */
#define SCTLR_AFE 0x20000000 /* AP[0] = Access Flag: 0 = disabled, 1 = enabled */
#define SCTLR_TE 0x40000000 /* Instruction set state for exceptions: 0 = ARM (default), 1 = Thumb */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __SCTLR_H_INCLUDED */

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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __SEG_H_INCLUDED
#define __SEG_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
#ifndef __ASM__
#include <comrogue/types.h>
#ifdef __COMROGUE_PRESTART__
#define SEG_INIT_CODE __attribute__((__section__(".prestart.text")))
#define SEG_INIT_DATA __attribute__((__section__(".prestart.data")))
#define SEG_INIT_RODATA __attribute__((__section__(".prestart.rodata")))
#define SEG_RODATA SEG_INIT_RODATA
#define SEG_LIB_CODE SEG_INIT_CODE
#define SEG_LIB_RODATA SEG_INIT_RODATA
#else
#define SEG_INIT_CODE __attribute__((__section__(".init.text")))
#define SEG_INIT_DATA __attribute__((__section__(".init.data")))
#define SEG_INIT_RODATA __attribute__((__section__(".init.rodata")))
#define SEG_RODATA __attribute__((__section__(".rodata")))
#define SEG_LIB_CODE __attribute__((__section__(".lib.text")))
#define SEG_LIB_RODATA __attribute__((__section__(".lib.rodata")))
#endif /* __COMROGUE_PRESTART__ */
#define DECLARE_INIT_STRING8_CONST(name, value) const CHAR SEG_INIT_RODATA name [] = value
#define DECLARE_LIB_STRING8_CONST(name, value) const CHAR SEG_LIB_RODATA name [] = value
#define DECLARE_STRING8_CONST(name, value) const CHAR SEG_RODATA name [] = value
#endif /* __ASM__ */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __SEG_H_INCLUDED */

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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __STARTUP_H_INCLUDED
#define __STARTUP_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
#ifdef __COMROGUE_PRESTART__
/*------------------------------------------------
* ATAG data passed to the kernel at startup time
*------------------------------------------------
*/
/* The different ATAG types. */
#define ATAGTYPE_NONE 0 /* none - end of list */
#define ATAGTYPE_CORE 0x54410001 /* core - this one must be first */
#define ATAGTYPE_MEM 0x54410002 /* memory */
#define ATAGTYPE_VIDEOTEXT 0x54410003 /* text-mode video */
#define ATAGTYPE_RAMDISK 0x54410004 /* RAM disk */
#define ATAGTYPE_INITRD2 0x54420005 /* compressed initial RAM disk */
#define ATAGTYPE_SERIAL 0x54410006 /* serial number */
#define ATAGTYPE_REVISION 0x54410007 /* revision */
#define ATAGTYPE_VIDEOLFB 0x54410008 /* linear framebuffer video */
#define ATAGTYPE_CMDLINE 0x54410009 /* command line */
/* Flags for the core ATAG's uiFlags member. */
#define ATAG_COREFLAG_READONLY 0x00000001 /* read only */
#define ATAG_RAMDISKFLAG_LOAD 0x00000001
#define ATAG_RAMDISKFLAG_PROMPT 0x00000002
#endif /* __COMROGUE_PRESTART__ */
#ifndef __ASM__
#include <comrogue/types.h>
#ifdef __COMROGUE_PRESTART__
/* Header of all ATAGs. */
typedef struct tagATAG_HEADER {
UINT32 uiSize; /* size of the tag, in 32-bit words */
UINT32 uiTag; /* the tag indicator */
} ATAG_HEADER, *PATAG_HEADER;
/* Core ATAG - must be first in the list */
typedef struct tagATAG_CORE {
ATAG_HEADER hdr; /* header */
UINT32 uiFlags; /* core flags, see above */
UINT32 uiPageSize; /* system page size in bytes */
UINT32 uiRootDevice; /* root device number */
} ATAG_CORE, *PATAG_CORE;
/* Memory ATAG */
typedef struct tagATAG_MEM {
ATAG_HEADER hdr; /* header */
UINT32 uiSize; /* size of memory */
PHYSADDR paStart; /* physical address of start of memory */
} ATAG_MEM, *PATAG_MEM;
/* Text-mode video ATAG */
typedef struct tagATAG_VIDEOTEXT {
ATAG_HEADER hdr; /* header */
BYTE bWidth; /* display width */
BYTE bHeight; /* display height */
UINT16 uiVideoPage;
BYTE bVideoMode;
BYTE bColumns;
UINT16 uiEGABX;
BYTE bLines;
BYTE bIsVGA;
UINT16 uiPoints;
} ATAG_VIDEOTEXT, *PATAG_VIDEOTEXT;
/* RAM disk ATAG */
typedef struct tagATAG_RAMDISK {
ATAG_HEADER hdr; /* header */
UINT32 uiFlags; /* RAM disk flags, see above */
UINT32 uiSize; /* size of ramdisk in kB */
UINT32 uiStartBlock; /* starting block of ramdisk */
} ATAG_RAMDISK, *PATAG_RAMDISK;
/* Initial ramdisk image ATAG */
typedef struct tagATAG_INITRD2 {
ATAG_HEADER hdr; /* header */
PHYSADDR paStart; /* physical address of compressed ramdisk image */
UINT32 uiSize; /* size of compressed ramdisk image in bytes */
} ATAG_INITRD2, *PATAG_INITRD2;
/* Serial number ATAG */
typedef struct tagATAG_SERIAL {
ATAG_HEADER hdr; /* header */
UINT32 uiSerialNumberLow; /* low word of serial number */
UINT32 uiSerialNumberHigh; /* high word of serial number */
} ATAG_SERIAL, *PATAG_SERIAL;
/* Revision number ATAG */
typedef struct tagATAG_REVISION {
ATAG_HEADER hdr; /* header */
UINT32 uiRevision; /* revision number */
} ATAG_REVISION, *PATAG_REVISION;
/* Linear framebuffer video ATAG */
typedef struct tagATAG_VIDEOLFB {
ATAG_HEADER hdr; /* header */
UINT16 uiFrameBufferWidth;
UINT16 uiFrameBufferHeight;
UINT16 uiFrameBufferDepth;
UINT16 uiFrameBufferLineLength;
UINT32 uiFrameBufferBase;
UINT32 uiFrameBufferSize;
BYTE bRedSize;
BYTE bRedPos;
BYTE bGreenSize;
BYTE bGreenPos;
BYTE bBlueSize;
BYTE bBluePos;
BYTE bReservedSize;
BYTE bReservedPos;
} ATAG_VIDEOLFB, *PATAG_VIDEOLFB;
/* Command line ATAG */
typedef struct tagATAG_CMDLINE {
ATAG_HEADER hdr; /* header */
CHAR szCommandLine[1]; /* text of command line, null-terminated */
} ATAG_CMDLINE, *PATAG_CMDLINE;
/* Macro to advance to the next ATAG */
#define kiNextATAG(p) ((PATAG_HEADER)(((PUINT32)(p)) + ((PATAG_HEADER)(p))->uiSize))
#endif /* __COMROGUE_PRESTART__ */
/*----------------------------------------------------------------
* The startup information buffer filled in by the prestart code.
*----------------------------------------------------------------
*/
typedef struct tagSTARTUP_INFO {
/* start of structure accessed from ASM - be careful here */
UINT32 cb; /* number of bytes in this structure */
PHYSADDR paTTB; /* physical address of the TTB */
KERNADDR kaTTB; /* kernel address of the TTB */
/* end of structure accessed from ASM - be careful here */
UINT32 uiMachineType; /* machine type indicator */
UINT32 uiRevision; /* board revision */
UINT32 uiSerialNumber; /* serial number */
UINT32 cpgSystemTotal; /* total number of memory pages in the system */
UINT32 cpgSystemAvail; /* available memory pages in the system after GPU takes its bite */
UINT32 cpgTTBGap; /* number of pages in the "gap" between the end of kernel and TTB */
PHYSADDR paMPDB; /* physical address of the Master Page Database */
KERNADDR kaMPDB; /* kernel address of the Master Page Database */
UINT32 cpgMPDB; /* number of pages we allocated for Master Page Database */
PHYSADDR paFirstPageTable; /* physical address of the first page table */
UINT32 cpgPageTables; /* number of pages we allocated for page tables */
UINT32 ctblFreeOnLastPage; /* number of page tables free on last page (0 or 1) */
PHYSADDR paFirstFree; /* first free physical address after initial page tables */
KERNADDR vmaFirstFree; /* first free virtual memory address after mapped TTB */
UINT32 uiEMMCClockFreq; /* EMMC clock frequency */
PHYSADDR paVCMem; /* VideoCore memory base */
UINT32 cbVCMem; /* VideoCore memory size in bytes */
UINT16 cxFBWidth; /* frame buffer width in pixels */
UINT16 cyFBHeight; /* frame buffer height in pixels */
BYTE abMACAddress[6]; /* MAC address of the network interface */
} STARTUP_INFO, *PSTARTUP_INFO;
#endif /* __ASM__ */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __STARTUP_H_INCLUDED */

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/*
* This file is part of the COMROGUE Operating System for Raspberry Pi
*
* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
* All rights reserved.
*
* This program is free for commercial and non-commercial use as long as the following conditions are
* adhered to.
*
* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
* in the code are not to be removed.
*
* Redistribution and use in source and binary forms, with or without modification, are permitted
* provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this list of conditions and
* the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
* the following disclaimer in the documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
*/
#ifndef __TRACE_H_INCLUDED
#define __TRACE_H_INCLUDED
#ifdef __COMROGUE_INTERNALS__
#ifndef __ASM__
#include <stdarg.h>
#include <comrogue/types.h>
#include <comrogue/scode.h>
#include <comrogue/compiler_macros.h>
#include <comrogue/internals/seg.h>
/*------------------------
* System trace functions
*------------------------
*/
CDECL_BEGIN
#ifdef __COMROGUE_PRESTART__
extern void ETrInit(void);
extern void ETrWriteChar8(CHAR c);
extern void ETrWriteString8(PCSTR psz);
extern void ETrWriteWord(UINT32 uiValue);
extern void ETrDumpWords(PUINT32 puiWords, UINT32 cWords);
extern void ETrAssertFailed(PCSTR pszFile, INT32 nLine);
extern void ETrInfiniBlink(void);
#define ASSERT_FAIL_FUNC ETrAssertFailed
#else
extern void TrInit(void);
extern void TrWriteChar8(CHAR c);
extern void TrWriteString8(PCSTR str);
extern void TrWriteWord(UINT32 uiValue);
extern HRESULT TrVPrintf8(PCSTR pszFormat, va_list pargs);
extern HRESULT TrPrintf8(PCSTR pszFormat, ...);
extern void TrAssertFailed(PCSTR pszFile, INT32 nLine);
extern void TrInfiniBlink(void);
#define ASSERT_FAIL_FUNC TrAssertFailed
#endif /* __COMROGUE_PRESTART__ */
CDECL_END
/*------------------------------------------------
* Macro definitions for the assert functionality
*------------------------------------------------
*/
#ifndef NDEBUG
#define THIS_FILE __FILE__
#if defined(__COMROGUE_PRESTART__) || defined(__COMROGUE_INIT__)
#define DECLARE_THIS_FILE static DECLARE_INIT_STRING8_CONST(THIS_FILE, __FILE__);
#else
#define DECLARE_THIS_FILE static DECLARE_STRING8_CONST(THIS_FILE, __FILE__);
#endif
#define ASSERT(x) ((x) ? (void)0 : ASSERT_FAIL_FUNC(THIS_FILE, __LINE__))
#define VERIFY(x) ASSERT(x)
#else
#define DECLARE_THIS_FILE
#define ASSERT(x) ((void)0)
#define VERIFY(x) ((void)(x))
#endif /* NDEBUG */
#endif /* __ASM__ */
#endif /* __COMROGUE_INTERNALS__ */
#endif /* __TRACE_H_INCLUDED */